IEEE - Institute of Electrical and Electronics Engineers, Inc. - Pre-Si estimation and compensation of SRAM layout deficiencies to achieve target performance and yield

2008 IEEE International Conference on Computer Design

Author(s): A. Bansal ; R.N. Singh ; S. Mukhopadhyay ; Geng Han ; Fook-Luen Heng ; Ching-Te Chuang
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2008
Conference Location: Lake Tahoe, CA, USA
Conference Date: 12 October 2008
Page(s): 457 - 462
ISBN (CD): 978-1-4244-2658-4
ISBN (Paper): 978-1-4244-2657-7
ISSN (Paper): 1063-6404
DOI: 10.1109/ICCD.2008.4751901
Regular:

With technology scaling, process constraints and imperfections result in significant variation of post-Si performance and stability of SRAM from designed/target pre-Si parameters. Modification/... View More

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