IEEE - Institute of Electrical and Electronics Engineers, Inc. - Timing characterization and layout of a low power differential C2MOS flip flop in 0.35μm technology

2008 2nd International Conference on Signals, Circuits and Systems (SCS)

Author(s): A. Dendouga ; N. Bouguechal ; S. Barra ; O. Manck
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2008
Conference Location: Monastir, Tunisia
Conference Date: 7 November 2008
Page(s): 1 - 4
ISBN (CD): 978-1-4244-2628-7
ISBN (Paper): 978-1-4244-2627-0
DOI: 10.1109/ICSCS.2008.4746891
Regular:

The chip developed (UltraSonic Low Voltage SAP for General Electric Medical) in co-operation of AEL (Advenced Electronic Laboratory university of Batna) and MAZ Brandenburg has been produced with... View More

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