IEEE - Institute of Electrical and Electronics Engineers, Inc. - An FPGA architecture for real-time polyphase 2D FIR double-trapezoidal plane-wave filters

APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

Author(s): T.K. Gunaratne ; H.L.P.A. Madanayake ; L.T. Bruton
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2008
Conference Location: Macao, China
Conference Date: 30 November 2008
Page(s): 984 - 987
ISBN (Paper): 978-1-4244-2341-5
ISBN (Online): 978-1-4244-2342-2
DOI: 10.1109/APCCAS.2008.4746189
Regular:

An architecture is proposed for the real-time hardware implementation of beamforming polyphase 2D FIR double-trapezoidal filters. Such filters are useful for high-throughput real-time beamforming... View More

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