IEEE - Institute of Electrical and Electronics Engineers, Inc. - A power-gating scheme for CAL circuits using single-phase power-clock

APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

Author(s): Weiqiang Zhang ; Li Su ; Jinghong Fu ; Jianping Hu
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2008
Conference Location: Macao, China
Conference Date: 30 November 2008
Page(s): 846 - 849
ISBN (Paper): 978-1-4244-2341-5
ISBN (Online): 978-1-4244-2342-2
DOI: 10.1109/APCCAS.2008.4746155
Regular:

This paper presents a power-gating scheme for CAL (clocked adiabatic logic) circuits to reduce energy loss during idle state. A transmission gate is used as the power-gating switch. It is inserted... View More

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