IEEE - Institute of Electrical and Electronics Engineers, Inc. - A low power consumption, high speed Op-amp for a 10-bit 100MSPS parallel pipeline ADC

APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

Author(s): Shang-Quan Liang ; Yong-Sheng Yin ; Hong-Hui Deng ; Yu-Kun Song ; Ming-Lun Gao
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2008
Conference Location: Macao, China
Conference Date: 30 November 2008
Page(s): 818 - 821
ISBN (Paper): 978-1-4244-2341-5
ISBN (Online): 978-1-4244-2342-2
DOI: 10.1109/APCCAS.2008.4746148
Regular:

A low power consumption, high speed op-amp is designed for a 10-bit, 100 MSPS parallel pipeline A/D converter. The op-amp plays an important role in the ADC, because its conversion rate and power... View More

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