IEEE - Institute of Electrical and Electronics Engineers, Inc. - Using Tabu Search for optimization of memory-constrained hybrid BIST

2008 International Biennial Baltic Electronics Conference

Author(s): H. Kruus ; G. Jervan ; R. Ubar
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2008
Conference Location: Tallinn, Estonia
Conference Date: 6 October 2008
Page(s): 155 - 158
ISBN (CD): 978-1-4244-2060-5
ISBN (Paper): 978-1-4244-2059-9
ISSN (Paper): 1736-3705
DOI: 10.1109/BEC.2008.4657502
Regular:

This paper deals with optimization of hybrid BIST testing approach with memory constraints. The traditional external tester is often unfeasible for embedded systems and therefore different... View More

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