IEEE - Institute of Electrical and Electronics Engineers, Inc. - Designs of the basic block reassembling Instruction Stream Buffer for X86 ISA

2008 13th Asia-Pacific Computer Systems Architecture Conference (ACSAC)

Author(s): Jih Ching Chiu ; Yu Liang Chou ; Ta Li Yeh ; Tseng Kuei Lin
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2008
Conference Location: Hsinchu, China
Conference Date: 4 August 2008
Page(s): 1 - 8
ISBN (CD): 978-1-4244-2683-6
ISBN (Paper): 978-1-4244-2682-9
DOI: 10.1109/APCSAC.2008.4625434
Regular:

The potential performance of superscalar processors can be exploited only when processor is fed with sufficient instruction bandwidth. The front-end units, the Instruction Stream Buffer (ISB) and... View More

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