IEEE - Institute of Electrical and Electronics Engineers, Inc. - Hardware transactional memory system for parallel programming

2008 13th Asia-Pacific Computer Systems Architecture Conference (ACSAC)

Author(s): Wang Huayong ; Hou Rui ; Wang Kun
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2008
Conference Location: Hsinchu, China
Conference Date: 4 August 2008
Page(s): 1 - 7
ISBN (CD): 978-1-4244-2683-6
ISBN (Paper): 978-1-4244-2682-9
DOI: 10.1109/APCSAC.2008.4625429
Regular:

Hardware transactional memory (HTM) is an attractive research topic in recent years. It has great potential to simplify parallel programming on the soon-to-be-ubiquitous multi-core systems.... View More

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