IEEE - Institute of Electrical and Electronics Engineers, Inc. - SRAM memory cell leakage reduction design techniques in 65nm low power PD-SOI CMOS

2008 IEEE International Conference on IC Design and Technology & Tutorial (ICICDT)

Author(s): O. Thomas ; M. Belleville ; R. Ferrant
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2008
Conference Location: Austin, TX, USA
Conference Date: 2 June 2008
Page(s): 51 - 54
ISBN (CD): 978-1-4244-1811-4
ISBN (Paper): 978-1-4244-1810-7
DOI: 10.1109/ICICDT.2008.4567244
Regular:

The paper presents a detailed study on the idle leakage reduction techniques on partially depleted silicon-on-insulator (PD-SOI) CMOS SRAM. The most promising leakage reduction techniques... View More

Advertisement