IEEE - Institute of Electrical and Electronics Engineers, Inc. - An innovative sub-32nm SRAM current sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatch

2008 IEEE International Conference on IC Design and Technology & Tutorial (ICICDT)

Author(s): A. Makosiej ; P. Nasalski ; B. Giraud ; A. Vladimirescu ; A. Amara
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2008
Conference Location: Austin, TX, USA
Conference Date: 2 June 2008
Page(s): 47 - 50
ISBN (CD): 978-1-4244-1811-4
ISBN (Paper): 978-1-4244-1810-7
DOI: 10.1109/ICICDT.2008.4567243
Regular:

This paper introduces a novel current sense amplifier (CSA) in sub-32nm fully depleted (FD) double-gate (DG) silicon-on-insulator (SOI) technology with planar independent self-aligned... View More

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