IEEE - Institute of Electrical and Electronics Engineers, Inc. - An estimation method of chip level power distribution network inductance using full wave simulation and segmentation method

2008 1st Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC) & 19th International Zurich Symposium on Electromagnetic Compatibility

Author(s): Jaemin Kim ; Jongjoo Shim ; Woojin Lee ; Jun So Pak ; Joungho Kim
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 May 2008
Conference Location: Singapore, Singapore
Conference Date: 19 May 2008
Page(s): 339 - 342
ISBN (CD): 978-981-08-0629-3
DOI: 10.1109/APEMC.2008.4559881
Regular:

An impedance profile of power distribution network (PDN) in system is an efficient criterion to evaluate the system performance in high-speed and high-performance semiconductor system design.... View More

Advertisement