IEEE - Institute of Electrical and Electronics Engineers, Inc. - Investigation of stress-induced voiding inside and under VIAS in copper interconnects with “wing” pattern

2008 IEEE International Reliability Physics Symposium (IRPS)

Author(s): H. Matsuyama ; T. Suzuki ; H. Ehara ; K. Yanai ; T. Kouno ; S. Otsuka ; N. Misawa ; T. Nakamura ; Y. Mizushima ; M. Shiozu ; M. Miyajima ; K. Shono
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 April 2008
Conference Location: Phoenix, AZ, USA
Conference Date: 27 April 2008
Page(s): 683 - 684
ISBN (CD): 978-1-4244-2050-6
ISBN (Paper): 978-1-4244-2049-0
DOI: 10.1109/RELPHY.2008.4558987
Regular:

Stress induce voiding (SIV) inside and under vias in copper interconnects with ldquowingrdquo-pattern were investigated for 90 nm and 65 nm node processes. The difference of two voidings... View More

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