IEEE - Institute of Electrical and Electronics Engineers, Inc. - Holistic pathfinding: Virtual wireless chip design for advanced technology and design exploration

2008 45th ACM/IEEE Design Automation Conference

Author(s): M. Nowak ; J. Corleto ; C. Chun ; R. Radojcic
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 June 2008
Conference Location: Anaheim, CA, USA
Conference Date: 8 June 2008
Page(s): 593
ISBN (Paper): 978-1-60558-115-6
ISSN (Paper): 0738-100X
DOI: 10.1145/1391469.1391620
Regular:

As CMOS technology is scaled beyond 45 nm, SOC/SiP design for wireless chips is increasingly constrained by fundamental technology limits, resulting in challenges including parametric variability,... View More

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