IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design and Implementation of FPGA Configuration Logic Block Using Asynchronous Semi-Static NCL Circuits

2008 IEEE Region 5 Conference

Author(s): I.P. Dugganapally ; W.K. Al-Assadi ; V. Pillai ; S. Smith
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 April 2008
Conference Location: Kansas City, MO, USA
Conference Date: 17 April 2008
Page(s): 1 - 6
ISBN (CD): 978-1-4244-2077-3
ISBN (Paper): 978-1-4244-2076-6
DOI: 10.1109/TPSD.2008.4562768
Regular:

This paper proposes the design of a FPGA configurable logic block (CLB) using asynchronous semi-static NULL convention logic (NCL) Library. The proposed design uses three semi-static LLT's for... View More

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