IEEE - Institute of Electrical and Electronics Engineers, Inc. - NMOS dense gate matrix VLSI design
Author(s): | K.H. Schmidt ; K.D. Mueller-Glaser |
Sponsor(s): | IEEE Solid-State Circuits Society |
Publisher: | IEEE - Institute of Electrical and Electronics Engineers, Inc. |
Publication Date: | 1 April 1983 |
Volume: | 18 |
Page(s): | 157 - 159 |
ISSN (Paper): | 0018-9200 |
ISSN (Online): | 1558-173X |
DOI: | 10.1109/JSSC.1983.1051916 |
Regular:
New optimized rules for a fast dense gate matrix layout in single-metal polysilicon-gate depletion-load NMOS technology are presented and applied to a cell design suitable for a VLSI custom cell... View More