IEEE - Institute of Electrical and Electronics Engineers, Inc. - A design- for-diagnosis technique for diagnosing both scan chain faults and combinational circuit faults

13th Asia and South Pacific Design Automation Conference ASP-DAC 2008

Author(s): Fei Wang ; Yu Hu ; Huawei Li ; Xiaowei Li
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2008
Conference Location: Seoul, South Korea
Conference Date: 21 March 2008
Page(s): 571 - 576
ISBN (CD): 978-1-4244-1922-7
ISBN (Paper): 978-1-4244-1921-0
DOI: 10.1109/ASPDAC.2008.4484017
Regular:

The amount of die area consumed by scan chains and scan control circuit can range from 15%~30%, and scan chain failures account for almost 50% of chip failures. As the conventional diagnosis... View More

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