IEEE - Institute of Electrical and Electronics Engineers, Inc. - Faster projection based methods for circuit level verification

13th Asia and South Pacific Design Automation Conference ASP-DAC 2008

Author(s): Chao Yan ; M. Greenstreet
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2008
Conference Location: Seoul, South Korea
Conference Date: 21 March 2008
Page(s): 410 - 415
ISBN (CD): 978-1-4244-1922-7
ISBN (Paper): 978-1-4244-1921-0
DOI: 10.1109/ASPDAC.2008.4483985
Regular:

As VLSI fabrication technology progresses to 65 nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates the verification of digital circuits using continuous... View More

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