IEEE - Institute of Electrical and Electronics Engineers, Inc. - Decomposition based approach for synthesis of multi-level threshold logic circuits

13th Asia and South Pacific Design Automation Conference ASP-DAC 2008

Author(s): T. Gowda ; S. Vrudhula
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2008
Conference Location: Seoul, South Korea
Conference Date: 21 March 2008
Page(s): 125 - 130
ISBN (CD): 978-1-4244-1922-7
ISBN (Paper): 978-1-4244-1921-0
DOI: 10.1109/ASPDAC.2008.4483925
Regular:

Scaling is currently the most popular technique used to improve performance metrics of CMOS circuits. This cannot go on forever because the properties that are responsible for the functioning of... View More

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