IEEE - Institute of Electrical and Electronics Engineers, Inc. - Parameterized Interconnect Modeling and Simulation in VLSI Design Considering Variations

40th Southeastern Symposium on System Theory

Author(s): Chunchen Liuf ; Ruei-Xi Chen ; Huang Huang ; J. Fan
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2008
Conference Location: New Orleans, LA, USA
Conference Date: 16 March 2008
Page(s): 225 - 229
ISBN (CD): 978-1-4244-1807-7
ISBN (Paper): 978-1-4244-1806-0
ISSN (Paper): 0094-2898
DOI: 10.1109/SSST.2008.4480226
Regular:

This paper proposed a new algorithm for modeling and simulation of interconnect circuit in nanometer very large scale integration (VLSI) design considering manufacturing process variations. The... View More

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