IEEE - Institute of Electrical and Electronics Engineers, Inc. - Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor

Design, Automation & Test in Europe. DATE'08

Author(s): T. Meyerowitz ; A. Sangiovanni-Vincentelli ; M. Sauermann ; D. Langen
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2008
Conference Location: Munich, Germany
Conference Date: 10 March 2008
Page(s): 276 - 279
ISBN (CD): 978-3-9810801-4-8
ISBN (Paper): 978-3-9810801-3-1
DOI: 10.1109/DATE.2008.4484897
Regular:

A generic and retargetable tool flow is presented that enables the export of timing data from software running on a cycle-accurate Virtual Prototype (VP) to a concurrent functional simulator.... View More

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