IEEE - Institute of Electrical and Electronics Engineers, Inc. - Power Balanced Gates Insensitive to Routing Capacitance Mismatch

Design, Automation & Test in Europe. DATE'08

Author(s): K.J. Kulikowski ; V. Venkataraman ; Zhen Wang ; A. Taubin
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2008
Conference Location: Munich, Germany
Conference Date: 10 March 2008
Page(s): 1,280 - 1,285
ISBN (CD): 978-3-9810801-4-8
ISBN (Paper): 978-3-9810801-3-1
DOI: 10.1109/DATE.2008.4484855
Regular:

Cryptographic hardware is vulnerable to power analysis attacks. To resist these attacks,special balanced dual-rail gates have been developed which have equal power consumption for all valid data... View More

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