IEEE - Institute of Electrical and Electronics Engineers, Inc. - Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design

Design, Automation & Test in Europe. DATE'08

Author(s): A.K. Verma ; P. Brisk ; P. Ienne
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 March 2008
Conference Location: Munich, Germany
Conference Date: 10 March 2008
Page(s): 1,250 - 1,255
ISBN (CD): 978-3-9810801-4-8
ISBN (Paper): 978-3-9810801-3-1
DOI: 10.1109/DATE.2008.4484850
Regular:

Adders are one of the key components in arithmetic circuits. Enhancing their performance can significantly improve the quality of arithmetic designs. This is the reason why the theoretical lower... View More

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