IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design of Reversible Finite Field Arithmetic Circuits with Error Detection

2008 21st International Conference on VLSI Design

Author(s): J. Mathew ; H. Rahaman ; B.R. Jose ; D.K. Pradhan
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2008
Conference Location: Hyderabad, India
Conference Date: 4 January 2008
Page(s): 453 - 459
ISBN (Paper): 0-7695-3083-4
ISSN (Paper): 1063-9667
DOI: 10.1109/VLSI.2008.96
Regular:

Motivated by the potential of reversible computing, we present a systematic method for the designing reversible arithmetic circuits for finite field or Galois fields of form GF(2m). It is shown... View More

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