IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 9 bit 400 MHz CMOS Double-Sampled Sample-and-Hold Amplifier

2008 21st International Conference on VLSI Design

Author(s): S. Roy ; S. Banerjee
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2008
Conference Location: Hyderabad, India
Conference Date: 4 January 2008
Page(s): 323 - 329
ISBN (Paper): 0-7695-3083-4
ISSN (Paper): 1063-9667
DOI: 10.1109/VLSI.2008.78
Regular:

A fully differential CMOS sample and hold amplifier SHA) is described here.The circuit is designed as a front end sampler of a low-power, high-speed analog to digital converter. The SHA uses... View More

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