IEEE - Institute of Electrical and Electronics Engineers, Inc. - A Partitioning Based Physical Scan Chain Allocation Algorithm that Minimizes Voltage Domain Crossings

2008 21st International Conference on VLSI Design

Author(s): N. Dev ; S. Bhatia ; S. Mukherjee ; S. Genova ; V. Kadam
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2008
Conference Location: Hyderabad, India
Conference Date: 4 January 2008
Page(s): 187 - 193
ISBN (Paper): 0-7695-3083-4
ISSN (Paper): 1063-9667
DOI: 10.1109/VLSI.2008.46
Regular:

In this paper we present an algorithm for allocating scan flops to scan chains based on the placement information of flops. The objective of the algorithm is to reduce the scan wire length, the... View More

Advertisement