IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design-for-Testability for Synchronous Sequential Circuits that Maintains Functional Switching Activity

2008 21st International Conference on VLSI Design

Author(s): I. Pomeranz ; S.M. Reddy
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2008
Conference Location: Hyderabad, India
Conference Date: 4 January 2008
Page(s): 181 - 186
ISBN (Paper): 0-7695-3083-4
ISSN (Paper): 1063-9667
DOI: 10.1109/VLSI.2008.17
Regular:

Design-for-testability (DFT) approaches that allow a synchronous sequential circuit to enter states that it cannot enter during functional operation improve the fault coverage achievable... View More

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