IEEE - Institute of Electrical and Electronics Engineers, Inc. - An FPGA-based digital class-D amplifier using short word-length

2007 Australasian Telecommunication Networks and Applications Conference (ATNAC 2007)

Author(s): D. Thakkar ; G. Lethbridge ; T. Targownik ; A. Ling ; A.Z. Sadik ; P. Beckett ; Z.M. Hussain
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2007
Conference Location: Christchurch, New Zealand
Conference Date: 2 December 2007
Page(s): 293 - 297
ISBN (CD): 978-1-4244-1558-8
ISBN (Paper): 978-1-4244-1557-1
DOI: 10.1109/ATNAC.2007.4665278
Regular:

A digital Class-D amplifier based on single-bit processing to be implemented on a field programmable gate array (FPGA) is presented. The main focus of this design is the reduction of noise, a... View More

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