IEEE - Institute of Electrical and Electronics Engineers, Inc. - Low-voltage CMOS four quadrant analogue multiplier designed in modified bridged-triode scheme (MBTS) using current conveyors

2007 International Conference on Intelligent and Advanced Systems

Author(s): Ng Min Shen ; S.S. Jamuar ; R. Sidek ; R. Wagiran
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2007
Conference Location: Kuala Lumpur, Malaysia
Conference Date: 25 November 2007
Page(s): 1,387 - 1,391
ISBN (CD): 978-1-4244-1356-0
ISBN (Paper): 978-1-4244-1355-3
DOI: 10.1109/ICIAS.2007.4658612
Regular:

A low-voltage, low-power CMOS analogue multiplier designed in a modified bridged-triode scheme (MBTS) using current conveyors is presented. It operates with a supply voltage of plusmn1 V, the... View More

Advertisement