IEEE - Institute of Electrical and Electronics Engineers, Inc. - Power reduction of chip multi-processors using shared resource control cooperating with DVFS

25th International Conference on Computer Design, ICCD 2007

Author(s): R. Watanabe ; M. Kondo ; H. Nakamura ; T. Nanya
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2007
Conference Location: Lake Tahoe, CA, USA
Conference Date: 7 October 2007
Page(s): 615 - 622
ISBN (CD): 978-1-4244-1258-7
ISBN (Paper): 978-1-4244-1257-0
ISSN (Paper): 1063-6404
DOI: 10.1109/ICCD.2007.4601961
Regular:

This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can be reduced... View More

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