IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design and Implementation of area optimized AES algorithm on reconfigurable FPGA

2007 International Conference on Microelectronics

Author(s): A. Rady ; E. El Sehely ; A.M. El Hennawy
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2007
Conference Location: Cairo, Egypt
Conference Date: 29 December 2007
Page(s): 35 - 38
ISBN (CD): 978-1-4244-1847-3
ISBN (Paper): 978-1-4244-1846-6
ISSN (Electronic): 2159-1679
ISSN (Paper): 2159-1660
DOI: 10.1109/ICM.2007.4497656
Regular:

Cryptography algorithms are becoming more necessary to ensure secure data transmission, which can be used in several applications. In this paper the hardware implementation of optimized area for... View More

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