IEEE - Institute of Electrical and Electronics Engineers, Inc. - Using the hardware/software co-design methodology to implement an embedded face recognition/verification system on an FPGA

2007 International Conference on Microelectronics

Author(s): G.F. Zaki ; R.A. Girgis ; W.W. Moussa ; W.R. Gabran
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2007
Conference Location: Cairo, Egypt
Conference Date: 29 December 2007
Page(s): 459 - 462
ISBN (CD): 978-1-4244-1847-3
ISBN (Paper): 978-1-4244-1846-6
DOI: 10.1109/ICM.2007.4497648
Regular:

An embedded face recognition/verification system has been implemented on an FPGA. The system recognizes/verifies the user by capturing his/her facial image via a digital image sensor and... View More

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