IEEE - Institute of Electrical and Electronics Engineers, Inc. - Floating-Point Fused Multiply-Add Architectures

2007 41st Asilomar Conference on Signals, Systems and Computers (ACSSC '07)

Author(s): E. Quinnell ; E.E. Swartzlander ; C. Lemonds
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2007
Conference Location: Pacific Grove, CA, USA
Conference Date: 4 November 2007
Page(s): 331 - 337
ISBN (CD): 978-1-4244-2110-7
ISBN (Paper): 978-1-4244-2109-1
ISSN (Paper): 1058-6393
DOI: 10.1109/ACSSC.2007.4487224
Regular:

Two new floating-point fused multiply-add architectures for the single instruction execution of (A times B) + C are presented. The three-path architecture uses parallel hardware paths similar to... View More

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