IEEE - Institute of Electrical and Electronics Engineers, Inc. - High-precision delay testing of Virtex-4 FPGA designs

2007 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS '07)

Author(s): J. Smith ; Tian Xia
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2007
Conference Location: Montreal, Que., Canada
Conference Date: 5 August 2007
Page(s): 1,360 - 1,363
ISBN (CD): 978-1-4244-1176-4
ISBN (Paper): 978-1-4244-1175-7
ISSN (Paper): 1548-3746
DOI: 10.1109/MWSCAS.2007.4488801
Regular:

We present a new method of performing high-resolution path delay testing on designs targeted to Xilinx Virtex-4 field-programmable gate arrays (FPGAs). Our built-in self-test architecture uses an... View More

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