IEEE - Institute of Electrical and Electronics Engineers, Inc. - Delay faults in dual-rail, self-reset wave-pipelined circuits

2007 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS '07)

Author(s): A. Al-Mousa ; S. Mourad
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2007
Conference Location: Montreal, Que., Canada
Conference Date: 5 August 2007
Page(s): 1,352 - 1,355
ISBN (CD): 978-1-4244-1176-4
ISBN (Paper): 978-1-4244-1175-7
ISSN (Paper): 1548-3746
DOI: 10.1109/MWSCAS.2007.4488800
Regular:

This paper presents a method to detect delay faults in wave-pipeline high speed arithmetic circuits that are constructed of dual-rail self-reset logic gates with input-disable. For this category... View More

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