IEEE - Institute of Electrical and Electronics Engineers, Inc. - Data strobe timing of DDR2 using a statistical random sampling technique

2007 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS '07)

Author(s): R.Z. Bhatti ; M. Denneau ; J. Draper
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2007
Conference Location: Montreal, Que., Canada
Conference Date: 5 August 2007
Page(s): 1,114 - 1,117
ISBN (CD): 978-1-4244-1176-4
ISBN (Paper): 978-1-4244-1175-7
ISSN (Paper): 1548-3746
DOI: 10.1109/MWSCAS.2007.4488753
Regular:

This paper presents a new way to tackle critical bus cycle timing issues related to DDR/DDR2 bus operations using a statistical random sampling technique. The technique allows a pure standard cell... View More

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