IEEE - Institute of Electrical and Electronics Engineers, Inc. - Parasitic-aware physical design optimization of deep sub-micron analog circuits

2007 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS '07)

Author(s): H. Chan ; Z. Zilic
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2007
Conference Location: Montreal, Que., Canada
Conference Date: 5 August 2007
Page(s): 1,022 - 1,025
ISBN (CD): 978-1-4244-1176-4
ISBN (Paper): 978-1-4244-1175-7
ISSN (Paper): 1548-3746
DOI: 10.1109/MWSCAS.2007.4488736
Regular:

Performance, versatility, portability and reliability are common goals of robust designs. In deep sub-micron technologies, these goals often contain contradicting objectives only revealed at the... View More

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