IEEE - Institute of Electrical and Electronics Engineers, Inc. - Two-phase clocking combined with sleep transistors reduces active leakage in low-frequency portable applications

2007 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS '07)

Author(s): F. Carbognani ; F. Buergin ; N. Felber ; H. Kaeslin ; W. Fichtner
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2007
Conference Location: Montreal, Que., Canada
Conference Date: 5 August 2007
Page(s): 964 - 967
ISBN (CD): 978-1-4244-1176-4
ISBN (Paper): 978-1-4244-1175-7
ISSN (Paper): 1548-3746
DOI: 10.1109/MWSCAS.2007.4488726
Regular:

The aggressive down-scaling in semiconductor devices implies the transistor voltage threshold reduction, which is associated with an exponential increase in sub-threshold leakage currents. For... View More

Advertisement