IEEE - Institute of Electrical and Electronics Engineers, Inc. - 64-bit pipeline conditional carry adder with MTCMOS TSPC logic

2007 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS '07)

Author(s): Shun-Wen Cheng
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2007
Conference Location: Montreal, Que., Canada
Conference Date: 5 August 2007
Page(s): 879 - 882
ISBN (CD): 978-1-4244-1176-4
ISBN (Paper): 978-1-4244-1175-7
ISSN (Paper): 1548-3746
DOI: 10.1109/MWSCAS.2007.4488712
Regular:

In this study, a 64-bit 8-stage pipeline conditional- carry adder (CCA) with the Multi-Threshold voltage CMOS (MTCMOS) TSPC logic for power-aware applications was designed and verified. The 64-bit... View More

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