IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 1 GHz decimation filter for Sigma-Delta ADC

2007 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS '07)

Author(s): Yong Lian ; Ying Wei ; R. Chandrasekaran
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2007
Conference Location: Montreal, Que., Canada
Conference Date: 5 August 2007
Page(s): 401 - 404
ISBN (CD): 978-1-4244-1176-4
ISBN (Paper): 978-1-4244-1175-7
ISSN (Paper): 1548-3746
DOI: 10.1109/MWSCAS.2007.4488614
Regular:

This paper presents the implementation of a high-speed decimation filter operating at Giga Hertz that is suitable for high-speed Delta-Sigma analog-to-digital converters. The filter is realized in... View More

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