IEEE - Institute of Electrical and Electronics Engineers, Inc. - Minimization of functional tests by statistical modelling of analogue circuits

2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era

Author(s): N. Akkouche ; A. Bounceur ; S. Mir ; E. Simeu
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2007
Conference Location: Rabat, Morocco
Conference Date: 2 September 2007
Page(s): 35 - 40
ISBN (CD): 978-1-4244-1278-5
ISBN (Paper): 978-1-4244-1277-8
DOI: 10.1109/DTIS.2007.4449488
Regular:

In this paper, we address the problem of functional test compaction of analogue circuits by using a statistical model of the performances of the Circuit Under Test (CUT). The statistical model is... View More

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