IEEE - Institute of Electrical and Electronics Engineers, Inc. - Minimum noise design of charge amplifiers with CMOS processes in the 100 nm feature size range

2007 IEEE Nuclear Science Symposium

Author(s): L. Ratti ; M. Manghisoni ; V. Re ; V. Speziali ; G. Traversi
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2007
Conference Location: Honolulu, HI, USA
Conference Date: 26 October 2007
Volume: 4
Page(s): 2,494 - 2,502
ISBN (CD): 978-1-4244-0923-5
ISBN (Paper): 978-1-4244-0922-8
ISSN (Paper): 1095-7863
DOI: 10.1109/NSSMIC.2007.4436661
Regular:

Low noise design of charge sensitive amplifiers in deep submicron CMOS technologies is discussed based on the experimental characterization of transistors belonging to a 130 nm and a 90 nm minimum... View More

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