IEEE - Institute of Electrical and Electronics Engineers, Inc. - Through Wafer Via Technology for MEMS and 3D Integration

2007 32nd IEEE/CPMT International Electronic Manufacturing Technology Symposium

Author(s): M. Rimskog
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2007
Conference Location: San Jose, CA, USA
Conference Date: 3 October 2007
Page(s): 286 - 289
ISBN (CD): 978-1-4244-1336-2
ISBN (Paper): 978-1-4244-1335-5
ISSN (Paper): 1089-8190
DOI: 10.1109/IEMT.2007.4417078
Regular:

The Through Silicon Via (TSV) process developed by Silex offers sub 50 μm pitch for through wafer connections in up to 600 μm thick substrates. The via process enables MEMS designs with... View More

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