IEEE - Institute of Electrical and Electronics Engineers, Inc. - Implementation of HSSec: a High–Speed Cryptographic Co-Processor

12th IEEE International Conference on Emerging Technologies and Factory Automation

Author(s): A.P. Kakarountas ; H. Michail ; C.E. Goutis ; C. Efstathiou
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 September 2007
Conference Location: Patras, Greece
Conference Date: 25 September 2007
Page(s): 625 - 631
ISBN (CD): 978-1-4244-0826-9
ISBN (Paper): 978-1-4244-0825-2
ISSN (Electronic): 1946-0759
ISSN (Paper): 1946-0740
DOI: 10.1109/EFTA.2007.4416827
Regular:

In this paper a high-speed cryptographic coprocessor, named HSSec, is presented. The core embeds two hash functions, SHA-1 and SHA-512, and the symmetric block cipher AES. The architecture of... View More

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