IEEE - Institute of Electrical and Electronics Engineers, Inc. - Leakage aware design for next generation’s SOCs

2007 7th International Conference on ASIC Proceeding

Author(s): R. Zafalon
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2007
Conference Location: Guilin, China
Conference Date: 22 October 2007
Page(s): 1,332
ISBN (CD): 978-1-4244-1132-0
ISBN (Paper): 978-1-4244-1131-3
DOI: 10.1109/ICASIC.2007.4415883
Regular:

We describe basic design techniques, that have proven to hold great potential for leakage optimization in practical design environments. They range from gate/circuit level (e.g. dual Vth, MTCMOS,... View More

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