IEEE - Institute of Electrical and Electronics Engineers, Inc. - Local refinement method for optimizing clock tree topology

2007 7th International Conference on ASIC Proceeding

Author(s): Qiang Fu ; Wai-Shing Luk ; Wenqing Zhao ; Shijun Chen ; Xuan Zeng
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2007
Conference Location: Guilin, China
Conference Date: 22 October 2007
Page(s): 1,110 - 1,113
ISBN (CD): 978-1-4244-1132-0
ISBN (Paper): 978-1-4244-1131-3
DOI: 10.1109/ICASIC.2007.4415827
Regular:

An effective method that incorporates with the Deferred-Merge Embedding algorithm is presented for clock tree construction. To achieve better performance, a sequence of tree topologies are... View More

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