IEEE - Institute of Electrical and Electronics Engineers, Inc. - NISAR: An AXI compliant on-chip NI architecture offering transaction reordering processing

2007 7th International Conference on ASIC Proceeding

Author(s): Xu Yang ; Zhang Qing-li ; Fu Fang-fa ; Yu Ming-yan ; Liu Cheng
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2007
Conference Location: Guilin, China
Conference Date: 22 October 2007
Page(s): 890 - 893
ISBN (CD): 978-1-4244-1132-0
ISBN (Paper): 978-1-4244-1131-3
DOI: 10.1109/ICASIC.2007.4415774
Regular:

In this paper, we present an AXI compliant Network Interface (NI) for NoC, which can deal with the reordering problem and support the adaptive routing. On the basic of analyzing the necessity and... View More

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