IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 14-bit 130-MSPS current-steering CMOS DAC with 2 x FIR interpolation filter

2007 7th International Conference on ASIC Proceeding

Author(s): Yong-Sheng Yin ; Ming-Lun Gao ; Hong-Hui Deng ; Shang-Quan Liang ; Cong Liu
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2007
Conference Location: Guilin, China
Conference Date: 22 October 2007
Page(s): 703 - 706
ISBN (CD): 978-1-4244-1132-0
ISBN (Paper): 978-1-4244-1131-3
DOI: 10.1109/ICASIC.2007.4415728
Regular:

A 14-bit, 130MSPS DAC with 2times FIR interpolation filter simulated in a 0.35 mum CMOS process is described in this paper. The DAC adopts segmented current-steering structure, which combines the... View More

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