IEEE - Institute of Electrical and Electronics Engineers, Inc. - Fractional-N phase locked loop design and applications

2007 7th International Conference on ASIC Proceeding

Author(s): R. Gu ; S. Ramaswamy
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2007
Conference Location: Guilin, China
Conference Date: 22 October 2007
Page(s): 327 - 332
ISBN (CD): 978-1-4244-1132-0
ISBN (Paper): 978-1-4244-1131-3
DOI: 10.1109/ICASIC.2007.4415633
Regular:

This paper presents fractional-N sigma-delta phase locked loop (PLL) applications and design. Applications focus primarily on wireless communication and clock synthesizers. Fractional-N PLL... View More

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