IEEE - Institute of Electrical and Electronics Engineers, Inc. - Review on Process-Induced Strain Techniques for Advanced Logic Technologies

15th IEEE International Conference on Advanced Thermal Processing of Semiconductors

Author(s): M. Wiatr ; T. Feudel ; A. Wei ; A. Mowry ; R. Boschke ; P. Javorka ; A. Gehring ; T. Kammler ; M. Lenski ; K. Frohberg ; R. Richter ; M. Horstmann ; D. Greenlaw
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 October 2007
Conference Location: Catania, Sicily, Italy
Conference Date: 2 October 2007
Page(s): 19 - 29
ISBN (CD): 978-1-4244-1228-0
ISBN (Paper): 978-1-4244-1227-3
DOI: 10.1109/RTP.2007.4383814
Regular:

We have extensively studied stress enhancing techniques to increase channel mobility starting at the 130 nm technology node and continued this towards the 45 nm node. Stressed overlayers and... View More

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