IEEE - Institute of Electrical and Electronics Engineers, Inc. - Implementation of a Virtual Internal Configuration Access Port (JCAP) for Enabling Partial Self-Reconfiguration on Xilinx Spartan III FPGAs

2007 International Conference on Field Programmable Logic and Applications, FPL 2007

Author(s): K. Paulsson ; M. Hubner ; G. Auer ; M. Dreschmann ; L. Chen ; J. Becker
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 August 2007
Conference Location: Amsterdam, Netherlands
Conference Date: 27 August 2007
Page(s): 351 - 356
ISBN (CD): 978-1-4244-1060-6
ISBN (Paper): 978-1-4244-1059-0
DOI: 10.1109/FPL.2007.4380671
Regular:

The exploitation of dynamic and partial hardware reconfiguration on FPGAs is currently being investigated in various research projects, dealing with systems for space applications to automotive... View More

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